The invention relates generally to integrated circuit fabrication and more particulary to the attachment or bonding of dies (chips) on a circuit substrate.
In the formation of complex electronic integrated circuits (IC's), e.g. hybrid wafer scale integrated (HWSI) circuits, a number of semiconductor integrated circuit chips (dies) are attached or bonded to a substrate. The speed and compactness of the circuit can be seriously affected by the methods used to package and interconnect the integrated circuit chips. After attachment, the chips or dies are electrically interconnected; copending U.S. Pat. application Ser. No. 202,296 filed June 6, 1988, now U.S. Pat. No. 4,992,847, issued Feb. 12, 1991, illustrates thin film chip to substrate interconnects and methods for making same. Thus, the various bonding means and processes used in packaging the electronic circuits form a significant part of the total circuit fabrication process. Unfortunately, the semiconductor chip is subject to considerable handling during these operations, and many problems of both yield and reliability can be traced to inadequate control during these processes.
Microcircuit chips typically range in size from as small as 20.times.20 mils to as large as 80.times.200 mils. In a typical conventional die bonding process, these chips are bonded to a gold-plated header (package substrate) by means of a gold-germanium eutectic preform (88% Au-12% Ge by weight). The preform is placed between the header (substrate) and the silicon die. The temperature of the combination is raised to 390.degree.-400.degree. C. and pressure is applied to the die in conjunction with a vibratory scrubbing motion. The scrubbing motion is a back and forth or oscillatory mechanical motion of the silicon die relative to the substrate, typically at 60-120 Hz. Eutectic melting occurs and a Au-Ge-Si bond results upon cooling. A gold-silicon system may also be used in place of the gold-germanium system. After the chips or dies are bonded to the package, leads are attached between chip bonding pads and terminal posts on the package and finally the package itself is sealed.
Eutectic die bonding bonds a die to a substrate using a metal preform (solder) which forms a bonding alloy. Eutectic die bonding metallurgically attaches the die, e.g. a silicon chip, to a metal or ceramic substrate material, typically a metal leadframe made of a Cu or Fe-Ni alloy, or to a ceramic substrate usually 90-99.5% Al.sub.2 O.sub.3. Metallization is often required on the back of the die (opposite the active circuit side) to make it wettable by the die bonding preform which is a thin sheet, usually less than 0.05 mm, of solder-bonding alloy. The substrate material is usually metallized with plated Ag (leadframes) or Au (leadframes or ceramic). Typical compositions for solder-preform materials include:
______________________________________ Temperature (.degree.C.) Composition Liquidus Solidus ______________________________________ 80% Au 20% Sn 280 280 92.5% Pb 2.5% Ag 5% In 300 97.5% Pb 1.5% Ag 1% Sn 309 309 95% Pb 5% Sn 314 310 88% Au 12% Ge 356 356 98% Au 2% Si 800 370 100% Au 1063 1063 ______________________________________
Solder die bonding to refractory ceramic packages which are to be hermetically sealed, or to Ni-Fe leadframes is usually performed with a Au or Au-2% Si preform.
Using the Au-2% Si preform to bond a silicon chip, in the presence of mechanical scrubbing and at temperatures above 370.degree. C. (the eutectic temperature), the preform reacts to dissolve the silicon. A Au-3.6% Si eutectic composition is reached and then exceeded. As the composition of the composite structure becomes more Si rich, it freezes and the die bond is completed. Some applications require lower temperature or more ductile die bonding solders to be compatible with other process steps.
The conventional Au-Si eutectic bond is relatively thick, about 25 microns, formed from a gold alloy preform in an atmospheric pressure environment using a scrub operation. The mechanical scrub step in the die bonding process is bad for formation of eutectic bonds since the scrubbing may scrape the bond away, makes it hard to place a chip accurately because of the mechanical motion, limits chip density, and limits the ability to bond multiple chips simultaneously. However, eutectic bonds are very good because of their good heat conduction, high reliability, lack of organics (no outgassing), good electrical conduction, and high temperature tolerance (typically up to about 300.degree. C.). Other materials such as organic materials, silver paste, and epoxies, can alternatively be used to form chip to substrate bonds without requiring a scrubbing operation. However, these bonds do not have all the desirable characteristics of the eutectic bond and are generally not as good.
Thin film eutectic bonds, e.g. 10 microns or less, are highly desirable, particularly for certain high performance circuits. In the chip interconnect process of application Ser. No. 202,296, now U.S. Pat. No. 4,992,847, it is necessary to form a very smooth flush joint at the chip substrate interface which is facilitated by a thin bond. A thin bond can also reduce stress; for example, in a silicon on silicon circuit structure stress is introduced by the bond since it is a different material and has a different coefficient of expansion. A thin bond also provides better heat conduction from chip to substrate.
It is also highly desirable for certain applications to have a void free bond. Void free bonds are useful for high power circuits, and are also advantageous for forming a smooth flush joint for chip interconnect as described in Ser. No. 202,296, now U.S. Pat. No. 4,992,847.